Lead SoC Verification Engineer

Location: San Jose, CA, United States
Date Posted: 04-16-2018
Position Title: Lead SOC Verification Engineer
Location: San Jose, CA
Status: Full-Time

About the Team:

The growing Encore Semi Verification team collaborates on the verification of SOCs based on innovative new core architectures. Joining our team, you will build on a background of SOC microarchitecture and coverage driven verification experiences to create efficient and stressful tests to flush out bugs in new designs. You will contribute to the development of infrastructure for debug and coverage to enable faster debug of failures and achievement of coverage goals.

About the Project:

As a senior member of an SOC development team, you will be responsible for leading a team of 8-10 Design Verification engineers to develop verification plans based on microarchitecture specifications and use SV/UVM based verification to both stress the design and cover the functional conditions specified in your plan. If you have experience in Functional Verification and debug of CPU, Memory or I/O subsystems at the full-chip level, joining the Encore Semi Verification team could be for you.

Minimum Qualifications:

• Knowledge of the entire SOC Design and Verification Life cycle with an emphasis on Design Verification tasks such as Test Bench creation, Test Planning, Writing and executing Tests, measuring test coverage, debugging tests and identifying RTL bugs
• Experience leading small to medium size teams, defining team deliverables and tasks, tracking on time execution with a focus on quality
• Experience with CPU, Memory or I/O Subsystem (caches, virtual memory, DMA, memory access optimizations) Microarchitectures.
• Experience identifying Functional Coverage conditions based on Microarchitecture specifications
• Debug experience using waveforms and ability to read and understand RTL code.
• 10-15 years of Functional Verification experience

Preferred Qualifications:

• Experience with verification of SOC integration for SOC’s using diverse IP’s 
• Verification Infrastructure development expertise working with simulation models (such as Synopsys VCS) and creating new simulation based debugging environments (based on waveforms or Verdi)
• Languages: System Verilog, Verilog, UVM/OVM, Specman (optional C/C++, ASM)
• Tools: Unix, Synopsys VCS, Verdi
• Architectures: CPU Cores, DDR3/4 Memory controllers, PCIe I/O controllers
• Plus: Verification experience using Mentor Veloce, Synopsys Zebu or Cadence Palladium systems 

Education Requirements:

• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering

About Encore Semi:

Encore Semi is a successful Engineering Solutions company. We build Centers of Expertise to support our many customers from the semiconductor and electronics system industry in North America. Our teams of experts contribute to leading-edge projects in the areas of SoC design and embedded software. We provide high-value through acceleration, performance improvement, optimization, and risk mitigation.

Encore Semi provides its engineering team members with continuous exposure to top advanced technologies & tools, participation in challenging yet exciting projects, and direct collaboration with its industry-leading teams, customers, and long-term partners. Learn more about the company’s great benefits and career path on our website.
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