Senior Design Verification Engineer

Location: San Jose, CA, United States
Date Posted: 08-11-2018
Position Title: Senior or Senior/Staff PCIe Design Verification Engineer
Location: Bay Area, CA
Status: Full-time

About the Team:
Join the growing Encore Semi Front-End Development team to collaborate with customers to design, verify and enable system level development for current and next generation SOCs.  You would join a team integrating 3rd party IPs into SOCs and verifying functional correctness of various aspects of the design building on your background of SOC Verification for designs including processor / controllers, interconnects and peripherals.

About the Project:
As a senior member of an SOC development team, you will be responsible for the Functional Verification of the 3rd party PCIe PHY IP with the PCIe controller using SV/UVM environments with the goal of quickly finding bugs in the design. You would be responsible for verifying the various protocols including clocking, reset, and DFT for the subsystem as well as the overall functionality of the PCIe Gen 4 protocols. If you have experience with Functional Verification of SOCs or Units with a heavy control logic focus using SV/UVM, directed random stimulus and a coverage-based methodology, joining the Encore Semi Verification team could be for you.

Minimum Qualifications:
• Experience with Functional (Design) Verification at the SOC or “Full-Chip” level using simulation models.  Experience should include creating Verification Plans based on the Microarchitecture Specifications and an understanding of the RTL itself
• Experience with PCIe Physical Layer (PHYs) and PCIe controllers – especially the transport layers.  Experience with PCIe Gen4 is preferred
• Strong expertise with SV/UVM methodology to create Verification environments and drive Functional Verification
• Experience debugging in an RTL simulation environment including waveform-based debugging
• 7+ years of Design Verification experience including working with RTL Developers

Preferred Qualifications:
• Experience with SOC design verification at the Full Chip or IP Level
• Verification experience on SOCs / ASICs for Storage (SSD, HDD) applications
• Experience developing Verification methodologies or environments incorporating various levels of coverage but, most importantly, functional coverage (as opposed to code or statement coverage)

Education Requirements:
• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering

About Encore Semi:

Encore Semi is a successful Engineering Solutions company. We build Centers of Expertise to support our many customers from the semiconductor and electronics system industry in North America. Our teams of experts contribute to leading-edge projects in the areas of SoC design and embedded software. We provide high-value through acceleration, performance improvement, optimization, and risk mitigation.

Encore Semi provides its engineering team members with continuous exposure to top advanced technologies & tools, participation in challenging yet exciting projects, and direct collaboration with its industry-leading teams, customers, and long-term partners. Learn more about the company’s great benefits and career path on our website.
 
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