Job Title
Category
Location
Senior Layout Designer for High-Performance Custom Digital Standard Cells
Category
Location
San Diego, CA
Lead Static Timing Analysis (STA) Engineer
Category
Location
San Diego, CA
Senior Design Verification Infrastructure and Methodology Engineer
Category
Location
Santa Clara, CA
Senior Design Verification Infrastructure and Methodology Engineer
Category
Location
San Diego, CA
Senior Design Verification Infrastructure and Methodology Engineer
Category
Location
Austin, TX
Senior DFT Engineer
Category
Location
Santa Clara, CA
Senior DFT Engineer
Category
Location
San Diego, CA
Senior DFT Engineer
Category
Location
Austin, TX
Senior PCIe Design Verification Engineer
Category
Location
Santa Clara, CA
Senior PCIe Design Verification Engineer
Category
Location
San Diego, CA
Senior PCIe Design Verification Engineer
Category
Location
Austin, TX
Senior CPU Subsystem Integration Engineer
Category
Location
San Diego, CA
Senior CPU Subsystem Integration Engineer
Category
Location
Santa Clara, CA
Senior CPU Subsystem Integration Engineer
Category
Location
Austin, TX