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Senior CPU Verification Engineer

Folsom, CA
Position Title: Senior CPU Verification Engineer
Location: Folsom, CA
Status: Full-time (salary + benefits + bonuses)

About the Team:
Join the growing Encore Semi Front-End Development team to collaborate with customers on the verification of CPUs and CPU SOCs targeting the enterprise server processing market.  Joining the team, you will build on a background of CPU core development to build unit level environments to stress the functional correctness of complex implementations.  You will join a larger CPU core development team to deliver next generation computing cores as part of the overall CPU SOC development organization.

About the Project:
As a member of the verification team of a complex core CPU, you will propose and build unit level test environments to stress the functional correctness of sub-systems within the larger design.  The development environment is Verilog based and will leverage direct-random and coverage-driven concepts to create stressful functional verification to flush bugs out of the design early in the design flow, ideally prior to integration into the full-chip simulation models.  If you have experience in Functional Verification and debug of complex CPU IPs or full CPU cores, joining the Encore Semi Verification team could be a good match for you.

Minimum Qualifications:
• 7+ years of Functional Verification experience creating and using unit / block level Verification environments and test content in Verilog or SystemVerilog.  Experience with Verification of blocks part of the main CPU core is strongly preferred.     
• Verification experience focused in any one of the aspects of core design such as instruction and data caches (including multi-level caches, memory coherency and coherent interconnect), branch prediction, instruction fetch and decode, execution and load / store units, interrupts and / or bus interfaces.
• Experience with complete CPU/Core subsystem verification (multi-threaded CPU’s, caches, execution acceleration or memory)
• Debug experience using waveforms and ability to read and understand RTL code.

Preferred Qualifications:
• Architecture understanding of CPU microarchitectures including ISAs, Out-Of-Order (OOO) / Superscalar Execution, multi-core and multi-threaded designs, symmetric multi-processing and similar performance improvement techniques.
• Experience with CPUs such as ARM, Power/PowerPC, x86, MIPS or RISC-V including experience coding and using assembly language tests.
• Experience building Verification models such as checkers or bus functional models using C/C++ to be used as part of the overall simulation environment.
• Verification of low power designs and processor low power modes.

Education Requirements:
• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering
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