logo

View all jobs

Senior SoC Timing Engineer

Raleigh, NC
Position Title: Senior Timing Engineer
Location: Raleigh or remote/work from home
Full-time: Salary + Benefits + Bonuses

About the Project:
As a Timing Engineer, you will work with microarchitecture, RTL design, CAD, block level and top level physical design teams to run, analyze timing and drive timing closure of complex SoC devices.

Responsibilities:
• Work with design and DFT teams to understand, implement and validate constraints 
• Run SOC timing runs at block level and SoC top level 
• Analyze timing and work with RTL/DFT teams to facilitate logic changes required 
• Work with CAD team to implement timing infrastructure 
• Create ECOs from timing runs to achieve timing closure 
• Document and help with timing methodology definition 

Minimum Qualifications:
• Experience in STA and timing closure of high-performance SOC designs in sub-micron technologies 
• Knowledge of all aspects of timing including noise, cross-talk and others  
• Knowledge of basic SoC architecture and Verilog HDL  

Preferred Qualifications:
• Experience in timing flows with industry standard tools  
• Experience in all aspects of timing closure for multi-clock domain designs 
• Experience in deep submicron process technology nodes is strongly preferred 
• Experience with STA on large SOC with multiple timing corners 
• Experience with Timing ECO implementation 
• Familiar with circuit modeling, transistor fundamentals and worst case corner selection  
• Solid understanding industry standard tools for synthesis, place & route and tape-out flows 

Education Requirements:
• Required: Bachelor of Science, Electrical Engineering (BSEE)
• Preferred: Master of Science, Electrical Engineering (MSEE)
Powered by