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Sr Design Verification Engineer – High-Speed Mixed-Signal (AI-Assisted Workflow)
Sr Design Verification Engineer – High-Speed Mixed-Signal (AI-Assisted Workflow)
Sr Design Verification Engineer – High-Speed Mixed-Signal (AI-Assisted Workflow)
Full-time: Salary + Benefits + Bonuses / Contractor - W2/hour
Work Status: US Citizen or Lawful Permanent Resident.
Location: San Diego CA (Hybrid)
The Role
Own and build the regression test environment for the digital subsystem of high-performance Quad ADC chip products. The design is mostly mixed signal/analog with a critical section of high-speed digital logic (250 MHz to 1 GHz).
Key Responsibilities
- Ramp up quickly on existing architecture and environment.
- Create and execute robust regression testbenches.
- Verify DSP blocks and high-speed data paths.
- Education & Experience: Minimum BS degree in EE/ECE/CS with 10+ years of hands-on digital verification experience.
- Cadence Xcelium simulation environment expert.
- Experience with SPI protocols and high-frequency (250 MHz–1 GHz) mixed-signal logic.
- Solid understanding of DSP verification.
- Proven ability to use AI tools for efficient data/log analysis and faster debugging.